July 2nd 2020 » History » Revision 9
Revision 8 (Alexandre Camsonne, 07/02/2020 03:14 PM) → Revision 9/14 (Alexandre Camsonne, 07/02/2020 03:15 PM)
h1. July 2nd 2020
*Updates
**VMM3 : Jeff still working - Neigbhoring channel readout : CERN mapping is different with UVA - UVA is mapped one to one so should work and easy to implement - Radiation tolerance of FPGA : rad hardness for SEL (latchup) up to few 100 krads ( space grade 300 krad ) new FPGA, can design for SEU - support chip rad hardness : DC converter / regulator - 300 krad 5 K$ - regular around 100 $ : data for different experiment , might be able to handle radiation needed - avoid FET based regulator and use bipolar - can supply low voltage directly ( but trickier ) - checking parts which could work
!https://redmine.jlab.org/attachments/download/1016/IMG_20191203_210642.jpg!
!https://redmine.jlab.org/attachments/download/1017/IMG_20191203_210632.jpg!