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April 8th 2021
Updates
VMM
*ordered FPGA
**will meet for testing / chip tested May¶
*APV25 : pedestal , need to terminate 1.25 V power line, running in sync
*UMass : PVDIS trigger - new version sent from Ben and starting on generating asymmetry
Updated by Alexandre Camsonne over 3 years ago · 1 revisions