August 13th 2020
*Jeff working on routing
Evaluation board : no clock signal for FPGA readout, option of external clock using CTF board but no CTF board available, send clock from GPVMM to our FPGA on uHDMI, picked FPGA eval board will use FMC connector - need order hardware - could use pulse generating for SAMPA to pulse the input
discuss with Jinhuang Hwang Michigan about TDS (about 100 K$ to total 250 K$) , and ROC designer , TDS high speed serialization
**Alexandre powered eval board - still need to configure to get trigger - will get instructions from Ed
*FADC VTP readout : switching
*MPD : setup used in clean room, might try to setup INFN cleanroom, rate tests, problem worse when buffering, will try 1.25
*ASOC : board powered
*UMAss : computer received, VXS
*VXS crate
*MAROC INFN : in ESB, setting up CODA

**VMM order : need to check testing

**Next week : 3 days -
remote power -
3.3 V - Artix - 12 V DC - Remote sensing supplies -

Updated by Alexandre Camsonne almost 4 years ago · 1 revisions