December 3rd 2020¶

• Maroc Cerenkov tests https://redmine.jlab.org/attachments/download/1113/LaserTestQuestions.pdf
  • test linearity with LED
    *Updates
  • VMM
    • 128 channels prototype : doing scaling from eval to 128 channels on-going, need to determine ressources used before the tripling method, trigger with window ( limit on how many trigger : 4 trigger in a windows - window size under 1 us ( 400 ns ? ) - can take a couple of MHz ) - TS can be programmed to allow only 4 triggers in the windows - need more processing power for more - trigger are counted, can realign data
    • got NSW ALTIM file of Micromegas design - schematics have a lot of useful notes - 8 chips on small card - Jeff will look at it
    • VMM3 order ok end of January
    • plan for december : finish eval readout direct output, processing of 128 channel code
    • evaluatiom development board : VHDL code complete, got the 1 gigE examaple, some work with Ben to get it going, C++ software code running on linux ( done at the lab )
  • FADC UMass
    ***use playback feature, helicity input for trigger and TI busy in FADC channel to measure deadtime
    • small issue with TI random trigger, get twice expected rate, put signal to check rate measurement ( 30 Hz ), can check random rate with event type. Can check with a regular pulser from TI. William will check the firmware
    • will try different bufferlevel and blocklevel, up to 20 KHz with block level and buffer level 1
    • rate Trigger 2 is twice Trigger 1 - Trig 2 affected by TI busy ?
  • APV
    • progress, will need test setup, will use BigBite setup for now
  • ASOC
  • FADC https://redmine.jlab.org/attachments/download/1112/FADC_dt2.pdf
    *Test ASOC https://redmine.jlab.org/attachments/download/1114/SoLID_cosmics.pdf pdf