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    Alexandre Camsonne, 06/03/2021 03:17 PM 
    
    
June 3rd 2021¶
*Updates- VMM
	- have chips
- started testing but don't see pulser signal - might be bad contact or bad chips - investigating low level tests - socket could have been damaged
- test test program with our test boards : it worked
- made cable to plug to power supply to check current : striped cable is center pin
- Jeff working on front end layout for filtering - close to MM Arizona design - once done will run design with Gianluigi
- simulating GBT link, code close to final version, testing with multiple inputs, gigabit ethernet can be tested too
- estimate early July for first prototype
- will run design through Ben and William too in next few days
 
- SoLID ECal
	- developement Ecal firmware, scalers and energy clusters - available end of the month for Hanjie
 
- UMass
Updated by Alexandre Camsonne over 4 years ago · 3 revisions