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October 22nd 2020 » History » Version 1

Alexandre Camsonne, 10/22/2020 03:21 PM

1 1 Alexandre Camsonne
h1. October 22nd 2020
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*Updates
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**VMM3
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*** did not see signal from eval board to FPGA probe, looked with probe, no signal on direct output, works with firmware with external clock
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*** Verso is installed linux - will try
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**APV : 
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*** QSFP / VXS data 7K$ 32 boards and 2 to 3 K$ for front panel, 20 days
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*** MPD
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**UMass : testing playback
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**SoLID ECal setup