Project

General

Profile

April 2nd 2020 » History » Version 4

Alexandre Camsonne, 04/02/2020 03:33 PM

1 1 Alexandre Camsonne
h1. April 2nd 2020
2
* Tasks overview [[https://redmine.jlab.org/projects/solid-prerd/issues/gantt]]
3
* Event unblocking ( Bryan ) : C code existing used for Compton , C++ code in work
4
* Discussion FADC VXS readout
5
*UMass test stand setup :
6
**VXS crate ordered
7
**loan older new TI version, SBS SD, intel CPU SBS
8
*VMM3 ( wrote info on main wiki page , will ask to Kondo to ship the boards )
9 2 Alexandre Camsonne
10
*Discussion VMM3 : need Xilinx programmer to load firmware, Ed will try virtual machine to run the linux software on his window computer. Asked Kondo to send the boards to Ed. Need to have access to Gitlab to get software.
11
12
*FADC VXS readout :
13
Ben talked with Ed some time ago,
14
Need to go to 3.125 gbps per lane instead of 2.5 gbps
15
TCP protocol already available on VTP ( roughly 2 weeks on his firmware side )
16
Ed will look at code for event building.
17
Starting from HPS firmware used for HCAL/Compton.
18
Possibility to enable compression.
19 3 Alexandre Camsonne
Software side : similar to things done already 
20
Currently exist with ROC on PC with PCI TI, need developement to have VTP ROC to handle 10 gigE
21
DAQ in lab up : VTP / FADC / SD can use to test , Hall A and C setup available too
22 4 Alexandre Camsonne
github with latest version for Ed
23 3 Alexandre Camsonne
24
APV25 testing : Danning back at UVA
25
SSP to 32 MPDs, still debugging - need to check to setup SSP and VTP at UVA
26
27
Unblocking - still development - need some help for analyzer implementation ( a bit later )
28
29
-Cerenkov : still need clean up scripts and add scalers
30
31
-INFN MAROC at JLAB
32 4 Alexandre Camsonne
33
-VTP order : company closed for now