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April 8th 2021 » History » Version 1

Alexandre Camsonne, 04/08/2021 04:12 PM

1 1 Alexandre Camsonne
h1. April 8th 2021
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*Updates
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**VMM
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***ordered FPGA 
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***will meet for testing / chip tested May
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*APV25 : pedestal , need to terminate 1.25 V power line, running in sync
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*UMass : PVDIS trigger - new version sent from Ben and starting on generating asymmetry