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August 24th 2023 » History » Version 1

Alexandre Camsonne, 08/24/2023 11:44 AM

1 1 Alexandre Camsonne 
h1. August 24th 2023
2 





    3
    
    
    
*Orders





    4
    
    
    
**





    5
    
    
    





    6
    
    
    
*VMM updates





    7
    
    
    
**Ed working on 10 bit mode





    8
    
    
    
**trying triggered mode by strobing the clock signal : can read with pulser





    9
    
    
    
**4 prototypes board working





    10
    
    
    
**Sergey used board with CODA and TI PCIe





    11
    
    
    
**continuous trigger mode : bug in VMM for 10 bit, should be 40 buffers but does not work, so dead time until readout





    12
    
    
    
**L0 mode : more stable, used by ATLAS, Ed implementing this mode, 8b/10b encoded data, only works in DDR mode, use over sampling to find the data





    13
    
    
    
*VMM readout





    14
    
    
    
**lpGBT FELIX





    15
    
    
    
**ARISTA 10 gig





    16
    
    
    
*LV Bpol





    17
    
    
    
**need to follow up with Huong





    18
    
    
    
*lpGBT order for TDIS and SoLID





    19
    
    
    
*Need new FELIX board for lpGBT





    20
    
    
    
*2 FELIX board due for JLab





    21
    
    
    
* 15 K$ FELIX





    22
    
    
    
*VTP





    23
    
    
    
*CODA compliant back, need TI data