December 17th 2020 » History » Version 3
Alexandre Camsonne, 12/17/2020 03:46 PM
| 1 | 1 | Alexandre Camsonne | h1. December 17th 2020 |
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| 2 | 2 | Alexandre Camsonne | * Ecal |
| 3 | 1 | Alexandre Camsonne | |
| 4 | * Updates |
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| 5 | ** VMM |
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| 6 | 3 | Alexandre Camsonne | *** met with Ben, progress on readout |
| 7 | *** measure time difference between clock from VMM to data, starting looking with probes |
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| 8 | 6 bit ADC should come at raising edge of the clock, but looking at it sometimes happens on falling edge |
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| 9 | need two good differential probes to check |
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| 10 | *** Ed plugged the VMM eval board to GEM chamber, will check everything ok before powering the GEM |
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| 11 | *** asked to Gianluigi and Venetios for testing |
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| 12 | 1 | Alexandre Camsonne | ** APV |
| 13 | 3 | Alexandre Camsonne | *** MPD : firmware to test fast readout - will try in TEDF |
| 14 | 1 | Alexandre Camsonne | ** FADC |
| 15 | *** slides from Hanjie |
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| 16 | 3 | Alexandre Camsonne | *** same setup without busy signal |
| 17 | *** test with raw mode - change of rate - test without writing to disk - 80 samples |
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| 18 | *** data rate - gigabit ethernet limit - and maybe VME limit |