March 21 2024 » History » Revision 3
Revision 2 (Alexandre Camsonne, 03/21/2024 12:52 PM) → Revision 3/4 (Alexandre Camsonne, 03/21/2024 02:02 PM)
h1. March 21 2024 * Updates VMM ** Working on L0 mode - Hall B planning to use ** Purchase for rad hard component for LHC : lpGBT and VTR+ and bPol 2.5 - for TDIS and SoLID - in queue for 14 months - letter of increase added because cost went up - increase quantity to have the SoLID ones - might be coming soon : lpGBT and bPol (2.5 -> 2.5 to 1.2) and bPol12 might come in a week - could make the radhard mezzanine - could use bPol for PRAD and SBS - can test and measure noise - ** VTR+ later ** interface from benchtop supply: design complete - still not ordered - need to be careful of spike at start - could ramp the supply ** Hall B has untested VMM - wants to make a 4 chips prototype - one engineer will test the VMM - will use one eval board with socket to test chips ** need to replace the desiccant for VMM ** SALSA : 50 MHz FADC - ** MPD - new version - ** Pixel chamber GEM - different pixel size - ~ 100 k channels ** check with Paolo, new MPD ** APV25 220nm process - SAMPA 120 ns - SALSA 65 nm - check if line still exist * Status orders ** FADC ordered ** VTP ordered ** TI ** SD ** VXS - 24 ordered need 8 more ** VETROC * MRPC electronics ** NALU ASOC and AARDVARC ** picoTDC ** SAMPIC *TDIS **wirechamber - 1 ns **SAMPA close to 2 ns with fitting of pulse at 20 MHz