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May 20th 2021
- Updates
- VMM
- Jeff and Ed working full time on prototype
Discussion VMM power: VMM requires 8 voltages rails
- slides for power distribution
- firmware work : almost done simulating GBT
- configuration VMM3 code
- check with Nilanga for parts
- VMM3 on site , compiling
- FPGA :
- waiting for quote and trying finish simulation and will order
- fast memory could be shortage too
- FADC being readout by Dave Abbott, modifying CODA to setup FPGA ROC
- Bryan working on MPD readout with VTP
- UMass
- preliminary results for asymmetry : 5% , but get 10 % need to check - not delayed - 30 Hz quad -
GEM UVA ready
start setup UVA X-ray
check if all harware needed for SSP readout
*can check Eval board VMM while waiting for prototype
- VMM
- Jeff and Ed working full time on prototype
Discussion VMM power: VMM requires 8 voltages rails - slides for power distribution
- firmware work : almost done simulating GBT
- configuration VMM3 code
- check with Nilanga for parts
- VMM3 on site , compiling
- FPGA :
- waiting for quote and trying finish simulation and will order
- fast memory could be shortage too
- Jeff and Ed working full time on prototype
- FADC being readout by Dave Abbott, modifying CODA to setup FPGA ROC
- Bryan working on MPD readout with VTP
- UMass
- preliminary results for asymmetry : 5% , but get 10 % need to check - not delayed - 30 Hz quad -
GEM UVA ready
start setup UVA X-ray
check if all harware needed for SSP readout
*can check Eval board VMM while waiting for prototype
- preliminary results for asymmetry : 5% , but get 10 % need to check - not delayed - 30 Hz quad -
Updated by Alexandre Camsonne over 3 years ago · 3 revisions