May 20th 2021 » History » Version 3
Alexandre Camsonne, 05/20/2021 02:38 PM
| 1 | 1 | Alexandre Camsonne | h1. May 20th 2021 |
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| 2 | 2 | Alexandre Camsonne | * Updates |
| 3 | ** VMM |
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| 4 | 3 | Alexandre Camsonne | *** Jeff and Ed working full time on prototype |
| 5 | Discussion VMM power: VMM requires 8 voltages rails |
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| 6 | *** slides for power distribution |
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| 7 | *** firmware work : almost done simulating GBT |
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| 8 | *** configuration VMM3 code |
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| 9 | *** check with Nilanga for parts |
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| 10 | *** VMM3 on site , compiling |
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| 11 | *** FPGA : |
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| 12 | *** waiting for quote and trying finish simulation and will order |
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| 13 | *** fast memory could be shortage too |
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| 14 | ** FADC being readout by Dave Abbott, modifying CODA to setup FPGA ROC |
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| 15 | *** Bryan working on MPD readout with VTP |
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| 16 | 1 | Alexandre Camsonne | ** UMass |
| 17 | 3 | Alexandre Camsonne | *** preliminary results for asymmetry : 5% , but get 10 % need to check - not delayed - 30 Hz quad - |
| 18 | **GEM UVA ready |
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| 19 | ***start setup UVA X-ray |
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| 20 | ***check if all harware needed for SSP readout |
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| 21 | ***can check Eval board VMM while waiting for prototype |