Project

General

Profile

May 7th 2020 » History » Version 2

Alexandre Camsonne, 05/07/2020 03:37 PM

1 1 Alexandre Camsonne
h1. May 7th 2020
2
3
4
Agenda
5
-updates
6
--VMM3
7 2 Alexandre Camsonne
Existing VMM3 board USTC - only subset of direct going to TDS - 
8
Eval board readout with one of existing FPGA board
9
Need to design a board to readout direct mode
10
Looking at data, but might be issues in the ROOT file generated - data might be corrupted - still being investigated
11
Need to design a board
12
Final experiment design : might need 
13
Could use a GBT 
14
check if we can get layout from USTC , check with Ge
15
16 1 Alexandre Camsonne
--FADC 
17 2 Alexandre Camsonne
Ben ready to start serialiasition for FADC, implementation of switch between VXS and VME. Checking code to run simulation and implementation.
18
19 1 Alexandre Camsonne
--APV25
20 2 Alexandre Camsonne
---can switch to optical or VME with library , some boards not connecting but can test on subset of MPDs
21 1 Alexandre Camsonne
22
-discussion VMM3 readout for X-ray tests
23
24 2 Alexandre Camsonne
25
-discussion Hall A Compton data : study FADC asymmetry of system
26
27
-streaming workshop next week 
28 1 Alexandre Camsonne
29
-AOB