November 19th 2020 » History » Version 1

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Alexandre Camsonne, 11/19/2020 03:46 PM


November 19th 2020

  • Updates
    • VMM3 : code for readout is done, and simulated for 12 channels. Code can handle up to 4 triggers in the window
      5 MHz burst rate capability, need to 1 gigE wrapper from Ben
    • scale code to 128 channels : might have bottlenecks for 128 channels, group in to 16 groups done in parallel to improve speed
      • prototype board design from Arizona: still waiting for design . Connector for power settled : high power connector
      • delay in VMM fabrication will try to get other chips for first production
      • GBT chip procurement
  • APV25
  • UMass test stand :
  • ASOC : trigger
  • Calorimeter : still 2 modules to be fixed - DAQ
  • SAMPA : get 50 SAMPA chips for prototype - advise to buy their boards from BNL - plan to get 25 000

FADC_dt1.pdf - fadc dead time test status and plan (98.7 KB) Hanjie Liu, 11/19/2020 03:47 PM